Intel has released a PHY Interface (the part of a silicon chip that lets the chipset and add-in cards communicate) for the latest revision of the PCI Express Architecture (PIPE) specification. The spec supports the future PCI Express (PCIe) 3.0 interconnect architecture and is expected to accelerate the development of PCIe devices such as graphics, storage and communications adapters. It also extends the existing PCIe 2.0 PIPE specification and is backwards compatible with previous generations. The spec is available here. Expect the 1.0 PHY spec around the same time as the final PCIe 3.0 spec. Learn more here.